Outsource Electronics Manufacturing
1-877-388-2708 | Contact Us

Compliance

Get started...

Compliance > FDA

FDA

OEM is registered with the FDA and capable of handling all types of medical device projects, assuring that they meet strict FDA standards.

 IPC Guidelines
IPC is an organization whose aim is to standardize the assembly and production requirements of electronic equipment and assemblies.  OEM meets IPC standards by adhering to their rigorous testing processes:

IPC (Institute of Interconnecting and Packaging Electronic Circuits)

Characteristic

IPC-600F Guideline *

Board edges

  • Haloing and nicks maximum .100" or 50% of distance to nearest conductor, whichever is less.

Bow and twist

  • General 1.5% max.
  • SMT boards 0.75%. max.

Conductor thickness

  • Table 3-9 (external)
  • Table 3-8 (internal)

Copper plating thickness, minimum in holes

  • Class 2, avg. .0008" , thin spots .0007"
  • Class 3, avg. .001", thin spots .0008" (Table 3-2)

Copper plating voids

  • Class 2 - One Cu void allowed per hole in not more than 5% of the holes.
  • Class 3 - No Cu voids allowed.
  • Shall not exceed 5% of hole length or 90° of circumference (Table 3-3)

Delamination/blisters

  • Evaluated in accordance with IPC-A-600
  • Class 1 now same as Class 2, 3 (2.3.3)
  • Evidence of delamination in micro section now refers to 2.3.3 instead of being automatically nonconforming (3.1.4)

Solder Dewetting

  • Ground planes and traces: allowed
  • Solder connection areas: max. 5% (Class 2, 3)

Finish plating voids

  • Class 2 - Three solder voids allowed per hole in not more than 5% of the holes.
  • Class 3 - One solder void per hole in not more than 5% of the holes.
  • Shall not exceed 5% of hole length or 90° of circumference (Table 3-3)

Foreign inclusions

  • Evaluated in accordance with IPC-A-600, except no maximum dimension specified (3.3.2.1)

Gold thickness

  • Class 2 - min. 30µ"· Class 3 - min. 50µ"· Solderable gold - 30µ" maximum.

Hole location

  • As specified on procurement document.

Hole sizes

  • ±.004" for plated through holes, ±.003 for non-plated through holes, +.003 / - hole size for vias, unless otherwise specified by customer

Solder Mask coverage

  • See 3.8.1

Solder Mask cure & adhesion

  • No tackiness
  • Blisters/delamination: 2 per side, max. .010 in, does not reduce spacing by more than 25%
  • Soda-strawing is now defined as applying to DFSM only (2.9.9)

Solder Mask in holes

  • Allowed only in holes in which are not to be soldered.

Solder Mask registration

 

Solder Mask thickness

  • Visual coverage; no thickness requirement

Solder Mask touch-up

  • Touch-up material specified (IPC-A-600F 2.9.1)

Measles/crazing

  • Evaluated in accordance with IPC-A-600
  • Measles acceptable for all except high voltage applications [not defined] (2.3.1)
  • Crazing spec. now same as delamination except 50% of distance between conductors may be spanned; also now shows pictures of crazing (2.3.2)

Min. ann. ring NPTH

  • Class 2: No breakout allowed.

Min. ann. ring-internal

  • Class 2: 90° breakout allowed

Min. external ann. ring - PTH

  • Class 2: 90° breakout allowed except at junction of pad and trace, where .002" minimum is allowed.

Nomenclature (silkscreen)

  • Refers to IPC-A-600 for legibility requirements Marking ink on surface mount lands no longer nonconforming (IPC-A-600F 2.8.3)

Nonwetting

  • None allowed

Pink ring

  • Acceptable (3.3.2.6)

Pits and voids in base material

  • Acceptable if no larger than 0.8 mm [.03 in] and no more than 5% of board area

Plating adhesion

  • Tape test required (slivers coming off with tape is not cause for rejection)

Plating cracks

  • See Table 3-7 (basically none allowed)

Resin fill of blind/buried vias

  • Buried vias shall be at least 60% filled with resin (3.3.14)

Routing tolerances

  • As specified on procurement document.

Spacing reduction

  • When not specified on the customer's documentation, 30% allowed for class 2; 20% allowed for class 3.

Tenting (via holes)

 

Tin/lead, solder coat

  • Unfused tin-lead: min. thickness .0003"
  • Fused or HAL: coverage and solderable.
  • Sidewalls do not have to be covered.

Trace width

  • Class 2, 3: When not specified on the customer's documentation, 20% max. line loss, additional 20% for isolated defects

Weave exposure and exposed/disrupted fibers

  • Acceptable for Class 1, 2, 3 as long as minimum conductor spacing is met.

Weave texture

  • Not addressed

 

Copyright © 1999-2017 OEM, Inc. All rights reserved.
RoHS Compliant